Programmable Logic Device - PLD - and CUPLKanda PLD trainer includes everything needed to learn about PLDs and CUPL descripion language, test board for trying designs and a universal programmer that can also program memory chips and microcontrollers as well as PLD.
This PLD logic training kit has an experiment board with an Atmel AT 16V8 and lights, switches, 7-segment LED, Clock and output enable. A version of CUPL description language especially for Atmel PLDs and a book on CD are included in the logic training kit and a full version of CUPL description language can be downloaded. Plus a USB programmer for Atmel 16V8, 20V8 and 22V10 PLD, Lattice PLD, serial EEPROMs and other memory.
Universal - CPLD and PLD Programmer
The PLD Programmer in the PLD Logic training kit supports Atmel 16V8, 20V8 and 22V10 devices but not CPLD.
Our Universal programmers from Wellon support PLD and CPLD programmable Logic Devices, so if you want to program CPLD (Complex Programmable Logic Device), or 16V8, 20V8 or 22V10 PLD from other manufacturers, such as Lattice, then have a look at:
Universal programmers with CPLD and PLD support.
The Wellon programmer range are low cost and different versions support a wide range of flash, EPROM, DRAM, SRAM and EEPROM memory, PLD, CPLD, and microcontrollers.
Atmel simple PLD (Programmable Logic Device) such as 16V8 and 22V10 are flash based programmable logic, so are re-programmable 100's of times. They are configured using the CUPL Description language and can be equivalent to older PAL and GAL devices or used as 16V8 or 22V10 devices.
The 16V8 PLD is ideal for logic training and general electronics as it can be programmed to be logic gates, inverters, flip-flops and registers using the CUPL programmable logic description language. It, and other Programmable Logic Devices (PLD)like 22V10 also give security and flexibility to your electronic circuits.
CUPL Programmable Logic Description Language is a compiler that converts logic equations into a Fuse map (JEDEC file) for the PLD programmer. Pins can be named using Kanda template, logic equations are simplified, Karnaugh maps can be employed and state machine techniques can be used.
The full version of CUPL programmble logic description language has simulation tools for testing equations, syntax for state machines and support for CPLD.
|PLD Logic Training||Universal PLD and CPLD Programmer|
Programmable Logic Device PLD Training
Universal and PLD Programmer
|Atmel 16V8 Programmble Logic Device||
Atmel 16V8 PLD